dc.contributor.author |
Rosselló, J.L. |
|
dc.contributor.author |
Canals, V. |
|
dc.contributor.author |
de Paúl, I. |
|
dc.contributor.author |
Bota, S.A. |
|
dc.contributor.author |
Morro, A. |
|
dc.date.accessioned |
2024-01-17T07:23:12Z |
|
dc.date.available |
2024-01-17T07:23:12Z |
|
dc.identifier.uri |
http://hdl.handle.net/11201/163740 |
|
dc.description.abstract |
A chaotic integrated circuit is designed and fabricated using a 0.35 μm CMOS process. The circuit iterates an N-shaped transfer function using a small analog neural network. One of the advantages of the proposed circuit is its small circuit area with only 13MOS transistors. The circuit generates both an analog and a digital signal that can be used to create true random bit sequences. |
|
dc.format |
application/pdf |
|
dc.relation.isformatof |
https://doi.org/10.1587/ELEX.5.1042 |
|
dc.relation.ispartof |
Ieice Electronics Express, 2008, vol. 5, num. 24, p. 1042-1048 |
|
dc.rights |
, 2008 |
|
dc.subject.classification |
62 - Enginyeria. Tecnologia |
|
dc.subject.classification |
53 - Física |
|
dc.subject.other |
62 - Engineering. Technology in general |
|
dc.subject.other |
53 - Physics |
|
dc.title |
A simple CMOS chaotic integrated circuit |
|
dc.type |
info:eu-repo/semantics/article |
|
dc.date.updated |
2024-01-17T07:23:12Z |
|
dc.rights.accessRights |
info:eu-repo/semantics/openAccess |
|
dc.identifier.doi |
https://doi.org/10.1587/ELEX.5.1042 |
|